ShaderType = IL_SHADER_PIXEL TargetChip = c ; ------------- SC_SRCSHADER Dump ------------------ SC_SHADERSTATE: u32NumIntVSConst = 0 SC_SHADERSTATE: u32NumIntPSConst = 0 SC_SHADERSTATE: u32NumIntGSConst = 0 SC_SHADERSTATE: u32NumBoolVSConst = 0 SC_SHADERSTATE: u32NumBoolPSConst = 0 SC_SHADERSTATE: u32NumBoolGSConst = 0 SC_SHADERSTATE: u32NumFloatVSConst = 0 SC_SHADERSTATE: u32NumFloatPSConst = 0 SC_SHADERSTATE: u32NumFloatGSConst = 0 fConstantsAvailable = 4208439 iConstantsAvailable = 4208439 bConstantsAvailable = 4208439 u32SCOptions[0] = 0x01A00000 SCOption_IGNORE_SAMPLE_L_BUG SCOption_FLOAT_DO_NOT_DIST SCOption_FLOAT_DO_NOT_REASSOC u32SCOptions[1] = 0x00202000 SCOption_R600_ERROR_ON_DOUBLE_MEMEXP SCOption_SET_VPM_FOR_SCATTER u32SCOptions[2] = 0x00000040 SCOption_R800_UAV_NONUAV_SYNC_WORKAROUND_BUG216513_1 ; -------- Disassembly -------------------- 00 ALU: ADDR(32) CNT(68) 0 x: FLOOR*2 R4.x, R0.x y: FLOOR*2 R4.y, R0.y z: MOV R4.z, (0xC0000000, -2.0f).x t: MOV R11.x, 0.0f 1 x: MOV R10.x, 0.0f y: MOV R11.y, 0.0f z: MOV R11.z, 0.0f w: MOV R11.w, 0.0f t: MOV R10.y, 0.0f 2 x: MOV R9.x, 0.0f y: MOV R9.y, 0.0f z: MOV R10.z, 0.0f w: MOV R10.w, 0.0f t: MOV R9.z, 0.0f 3 x: MOV R23.x, 0.0f y: MOV R23.y, 0.0f z: MOV R23.z, 0.0f w: MOV R9.w, 0.0f t: MOV R23.w, 0.0f 4 x: MOV R8.x, 0.0f y: MOV R8.y, 0.0f z: MOV R8.z, 0.0f w: MOV R8.w, 0.0f t: MOV R22.x, 0.0f 5 x: MOV R21.x, 0.0f y: MOV R22.y, 0.0f z: MOV R22.z, 0.0f w: MOV R22.w, 0.0f t: MOV R21.y, 0.0f 6 x: MOV R20.x, 0.0f y: MOV R20.y, 0.0f z: MOV R21.z, 0.0f w: MOV R21.w, 0.0f t: MOV R20.z, 0.0f 7 x: MOV R15.x, 0.0f y: MOV R15.y, 0.0f z: MOV R15.z, 0.0f w: MOV R20.w, 0.0f t: MOV R15.w, 0.0f 8 x: MOV R14.x, 0.0f y: MOV R14.y, 0.0f z: MOV R14.z, 0.0f w: MOV R14.w, 0.0f t: MOV R13.x, 0.0f 9 x: MOV R12.x, 0.0f y: MOV R13.y, 0.0f z: MOV R13.z, 0.0f w: MOV R13.w, 0.0f t: MOV R12.y, 0.0f 10 x: MOV R19.x, 0.0f y: MOV R19.y, 0.0f z: MOV R12.z, 0.0f w: MOV R12.w, 0.0f t: MOV R19.z, 0.0f 11 x: MOV R18.x, 0.0f y: MOV R18.y, 0.0f z: MOV R18.z, 0.0f w: MOV R19.w, 0.0f t: MOV R18.w, 0.0f 12 x: MOV R17.x, 0.0f y: MOV R17.y, 0.0f z: MOV R17.z, 0.0f w: MOV R17.w, 0.0f t: MOV R16.x, 0.0f 13 y: MOV R16.y, 0.0f z: MOV R16.z, 0.0f w: MOV R16.w, 0.0f 01 LOOP_DX10 i0 FAIL_JUMP_ADDR(7) 02 ALU_BREAK: ADDR(100) CNT(3) KCACHE0(CB0:0-15) 14 z: ADD R4.z, R4.z, (0x40000000, 2.0f).x 15 x: PREDNE ____, R4.z, KC0[0].y UPDATE_EXEC_MASK UPDATE_PRED 03 TEX: ADDR(288) CNT(8) VALID_PIX 16 SAMPLE R0, R4.yz0y, t0, s0 UNNORM(XYZW) 17 SAMPLE R2, R4.yz0y, t0, s1 UNNORM(XYZW) XOFFSET(1.0) 18 SAMPLE R1, R4.xz0x, t1, s2 UNNORM(XYZW) 19 SAMPLE R3, R4.xz0x, t1, s3 UNNORM(XYZW) XOFFSET(1.0) 20 SAMPLE R5, R4.yz0y, t0, s4 UNNORM(XYZW) YOFFSET(1.0) 21 SAMPLE R6, R4.yz0y, t0, s5 UNNORM(XYZW) XOFFSET(1.0) YOFFSET(1.0) 22 SAMPLE R7, R4.xz0x, t1, s6 UNNORM(XYZW) YOFFSET(1.0) 23 SAMPLE R24, R4.xz0x, t1, s7 UNNORM(XYZW) XOFFSET(1.0) YOFFSET(1.0) 04 ALU_BREAK: ADDR(103) CNT(65) KCACHE0(CB0:0-15) 24 x: MULADD R23.x, R0.x, R1.x, R23.x y: MULADD R23.y, R0.x, R1.y, R23.y z: MULADD R23.z, R0.x, R1.z, R23.z w: MULADD R23.w, R0.x, R1.w, R23.w 25 x: MULADD R22.x, R0.y, R1.x, R22.x VEC_210 y: MULADD R22.y, R0.y, R1.y, R22.y VEC_201 z: MULADD R22.z, R0.y, R1.z, R22.z VEC_201 w: MULADD R22.w, R0.y, R1.w, R22.w VEC_201 t: MULADD R21.x, R0.z, R1.x, R21.x VEC_120 26 x: MULADD R20.x, R0.w, R1.x, R20.x VEC_201 y: MULADD R21.y, R0.z, R1.y, R21.y VEC_210 z: MULADD R21.z, R0.z, R1.z, R21.z VEC_201 w: MULADD R21.w, R0.z, R1.w, R21.w VEC_201 t: MULADD R20.y, R0.w, R1.y, R20.y VEC_120 27 x: MULADD R19.x, R0.x, R3.x, R19.x y: MULADD R19.y, R0.x, R3.y, R19.y z: MULADD R20.z, R0.w, R1.z, R20.z w: MULADD R20.w, R0.w, R1.w, R20.w 28 x: MULADD R18.x, R0.y, R3.x, R18.x VEC_201 y: MULADD R18.y, R0.y, R3.y, R18.y VEC_201 z: MULADD R19.z, R0.x, R3.z, R19.z VEC_210 w: MULADD R19.w, R0.x, R3.w, R19.w VEC_201 t: MULADD R18.z, R0.y, R3.z, R18.z VEC_120 29 x: MULADD R17.x, R0.z, R3.x, R17.x VEC_201 y: MULADD R17.y, R0.z, R3.y, R17.y VEC_201 z: MULADD R17.z, R0.z, R3.z, R17.z VEC_201 w: MULADD R18.w, R0.y, R3.w, R18.w VEC_210 t: MULADD R17.w, R0.z, R3.w, R17.w VEC_120 30 x: MULADD R16.x, R0.w, R3.x, R16.x VEC_210 y: MULADD R16.y, R0.w, R3.y, R16.y VEC_201 z: MULADD R16.z, R0.w, R3.z, R16.z VEC_201 w: MULADD R16.w, R0.w, R3.w, R16.w VEC_201 t: MULADD R10.x, R2.y, R3.x, R10.x VEC_120 31 x: MULADD R15.x, R2.x, R1.x, R15.x y: MULADD R15.y, R2.x, R1.y, R15.y z: MULADD R15.z, R2.x, R1.z, R15.z w: MULADD R15.w, R2.x, R1.w, R15.w 32 x: MULADD R14.x, R2.y, R1.x, R14.x VEC_210 y: MULADD R14.y, R2.y, R1.y, R14.y VEC_201 z: MULADD R14.z, R2.y, R1.z, R14.z VEC_201 w: MULADD R14.w, R2.y, R1.w, R14.w VEC_201 t: MULADD R13.x, R2.z, R1.x, R13.x VEC_120 33 x: MULADD R12.x, R2.w, R1.x, R12.x VEC_201 y: MULADD R13.y, R2.z, R1.y, R13.y VEC_210 z: MULADD R13.z, R2.z, R1.z, R13.z VEC_201 w: MULADD R13.w, R2.z, R1.w, R13.w VEC_201 t: MULADD R12.y, R2.w, R1.y, R12.y VEC_120 34 x: MULADD R11.x, R2.x, R3.x, R11.x y: MULADD R11.y, R2.x, R3.y, R11.y z: MULADD R12.z, R2.w, R1.z, R12.z w: MULADD R12.w, R2.w, R1.w, R12.w 35 x: MULADD R8.x, R2.w, R3.x, R8.x y: MULADD R10.y, R2.y, R3.y, R10.y VEC_201 z: MULADD R11.z, R2.x, R3.z, R11.z w: MULADD R11.w, R2.x, R3.w, R11.w t: MULADD R10.z, R2.y, R3.z, R10.z 36 x: MULADD R9.x, R2.z, R3.x, R9.x VEC_201 y: MULADD R9.y, R2.z, R3.y, R9.y VEC_201 z: MULADD R9.z, R2.z, R3.z, R9.z VEC_201 w: MULADD R10.w, R2.y, R3.w, R10.w VEC_210 t: MULADD R9.w, R2.z, R3.w, R9.w VEC_120 37 y: MULADD R8.y, R2.w, R3.y, R8.y z: MULADD R8.z, R2.w, R3.z, R8.z w: MULADD R8.w, R2.w, R3.w, R8.w 38 x: PREDNE ____, KC0[0].z, 1.0f UPDATE_EXEC_MASK UPDATE_PRED 05 ALU: ADDR(168) CNT(64) 39 x: MULADD R23.x, R5.x, R7.x, R23.x y: MULADD R23.y, R5.x, R7.y, R23.y z: MULADD R23.z, R5.x, R7.z, R23.z w: MULADD R23.w, R5.x, R7.w, R23.w 40 x: MULADD R22.x, R5.y, R7.x, R22.x VEC_210 y: MULADD R22.y, R5.y, R7.y, R22.y VEC_201 z: MULADD R22.z, R5.y, R7.z, R22.z VEC_201 w: MULADD R22.w, R5.y, R7.w, R22.w VEC_201 t: MULADD R21.x, R5.z, R7.x, R21.x VEC_120 41 x: MULADD R20.x, R5.w, R7.x, R20.x VEC_201 y: MULADD R21.y, R5.z, R7.y, R21.y VEC_210 z: MULADD R21.z, R5.z, R7.z, R21.z VEC_201 w: MULADD R21.w, R5.z, R7.w, R21.w VEC_201 t: MULADD R20.y, R5.w, R7.y, R20.y VEC_120 42 x: MULADD R19.x, R5.x, R24.x, R19.x y: MULADD R19.y, R5.x, R24.y, R19.y z: MULADD R20.z, R5.w, R7.z, R20.z w: MULADD R20.w, R5.w, R7.w, R20.w 43 x: MULADD R18.x, R5.y, R24.x, R18.x VEC_201 y: MULADD R18.y, R5.y, R24.y, R18.y VEC_201 z: MULADD R19.z, R5.x, R24.z, R19.z VEC_210 w: MULADD R19.w, R5.x, R24.w, R19.w VEC_201 t: MULADD R18.z, R5.y, R24.z, R18.z VEC_120 44 x: MULADD R17.x, R5.z, R24.x, R17.x VEC_201 y: MULADD R17.y, R5.z, R24.y, R17.y VEC_201 z: MULADD R17.z, R5.z, R24.z, R17.z VEC_201 w: MULADD R18.w, R5.y, R24.w, R18.w VEC_210 t: MULADD R17.w, R5.z, R24.w, R17.w VEC_120 45 x: MULADD R16.x, R5.w, R24.x, R16.x VEC_210 y: MULADD R16.y, R5.w, R24.y, R16.y VEC_201 z: MULADD R16.z, R5.w, R24.z, R16.z VEC_201 w: MULADD R16.w, R5.w, R24.w, R16.w VEC_201 t: MULADD R10.x, R6.y, R24.x, R10.x VEC_120 46 x: MULADD R15.x, R6.x, R7.x, R15.x y: MULADD R15.y, R6.x, R7.y, R15.y z: MULADD R15.z, R6.x, R7.z, R15.z w: MULADD R15.w, R6.x, R7.w, R15.w 47 x: MULADD R14.x, R6.y, R7.x, R14.x VEC_210 y: MULADD R14.y, R6.y, R7.y, R14.y VEC_201 z: MULADD R14.z, R6.y, R7.z, R14.z VEC_201 w: MULADD R14.w, R6.y, R7.w, R14.w VEC_201 t: MULADD R13.x, R6.z, R7.x, R13.x VEC_120 48 x: MULADD R12.x, R6.w, R7.x, R12.x VEC_201 y: MULADD R13.y, R6.z, R7.y, R13.y VEC_210 z: MULADD R13.z, R6.z, R7.z, R13.z VEC_201 w: MULADD R13.w, R6.z, R7.w, R13.w VEC_201 t: MULADD R12.y, R6.w, R7.y, R12.y VEC_120 49 x: MULADD R11.x, R6.x, R24.x, R11.x y: MULADD R11.y, R6.x, R24.y, R11.y z: MULADD R12.z, R6.w, R7.z, R12.z w: MULADD R12.w, R6.w, R7.w, R12.w 50 x: MULADD R8.x, R6.w, R24.x, R8.x y: MULADD R10.y, R6.y, R24.y, R10.y VEC_201 z: MULADD R11.z, R6.x, R24.z, R11.z w: MULADD R11.w, R6.x, R24.w, R11.w t: MULADD R10.z, R6.y, R24.z, R10.z 51 x: MULADD R9.x, R6.z, R24.x, R9.x VEC_201 y: MULADD R9.y, R6.z, R24.y, R9.y VEC_201 z: MULADD R9.z, R6.z, R24.z, R9.z VEC_201 w: MULADD R10.w, R6.y, R24.w, R10.w VEC_210 t: MULADD R9.w, R6.z, R24.w, R9.w VEC_120 52 y: MULADD R8.y, R6.w, R24.y, R8.y z: MULADD R8.z, R6.w, R24.z, R8.z w: MULADD R8.w, R6.w, R24.w, R8.w 06 ENDLOOP i0 PASS_JUMP_ADDR(2) 07 ALU: ADDR(232) CNT(21) KCACHE0(CB0:0-15) 53 y: MOV*4 R0.y, R4.y z: NOP ____ t: F_TO_I T0.z, KC0[0].x 54 x: LSHL R4.x, PS53, 1 y: MULADD R123.y, PV53.y, KC0[0].x, R4.x 55 x: MOV R3.x, 0.0f y: MOV R3.y, 0.0f z: MOV R3.z, 0.0f w: MOV R3.w, 0.0f t: F_TO_I ____, PV54.y 56 x: LSHL R0.x, PS55, (0x00000002, 2.802596929e-45f).x y: ADD_INT ____, PS55, 1 z: ADD_INT R1.z, PS55, R4.x w: ADD_INT ____, PS55, T0.z 57 x: LSHL R1.x, PV56.y, (0x00000002, 2.802596929e-45f).x y: ADD_INT R0.y, PV56.y, R4.x z: ADD_INT R0.z, PV56.y, T0.z w: ADD_INT R0.w, PV56.w, R4.x t: LSHL R2.x, PV56.w, (0x00000002, 2.802596929e-45f).x 08 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R0.x], R23, ELEM_SIZE(3) VPM 09 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R1.x], R19, ELEM_SIZE(3) VPM 10 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R2.x], R22, ELEM_SIZE(3) VPM 11 EXP_DONE: PIX0, R3 12 ALU: ADDR(253) CNT(12) 58 x: LSHL R2.x, R0.z, (0x00000002, 2.802596929e-45f).x y: ADD_INT R1.y, R4.x, R0.y z: ADD_INT R0.z, R4.x, R1.z w: ADD_INT R1.w, R0.z, R4.x t: LSHL R1.x, R1.z, (0x00000002, 2.802596929e-45f).x 59 x: LSHL R0.x, R0.y, (0x00000002, 2.802596929e-45f).x y: ADD_INT R0.y, R4.x, PV58.z z: ADD_INT R1.z, R4.x, PV58.w w: ADD_INT R0.w, R4.x, R0.w t: LSHL R3.x, R0.w, (0x00000002, 2.802596929e-45f).x 13 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R2.x], R18, ELEM_SIZE(3) VPM 14 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R1.x], R21, ELEM_SIZE(3) VPM 15 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R0.x], R17, ELEM_SIZE(3) VPM 16 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R3.x], R20, ELEM_SIZE(3) VPM 17 ALU: ADDR(265) CNT(9) 60 x: LSHL R4.x, R1.w, (0x00000002, 2.802596929e-45f).x y: ADD_INT R2.y, R4.x, R1.z z: ADD_INT R0.z, R4.x, R0.w w: ADD_INT R1.w, R4.x, R1.y t: LSHL R3.x, R0.z, (0x00000002, 2.802596929e-45f).x 61 x: LSHL R0.x, R1.y, (0x00000002, 2.802596929e-45f).x t: LSHL R1.x, R0.w, (0x00000002, 2.802596929e-45f).x 18 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R4.x], R16, ELEM_SIZE(3) VPM 19 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R3.x], R15, ELEM_SIZE(3) VPM 20 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R0.x], R11, ELEM_SIZE(3) VPM 21 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R1.x], R14, ELEM_SIZE(3) VPM 22 ALU: ADDR(274) CNT(6) 62 x: LSHL R1.x, R1.z, (0x00000002, 2.802596929e-45f).x t: LSHL R0.x, R0.y, (0x00000002, 2.802596929e-45f).x 63 x: LSHL R3.x, R1.w, (0x00000002, 2.802596929e-45f).x t: LSHL R4.x, R0.z, (0x00000002, 2.802596929e-45f).x 23 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R1.x], R10, ELEM_SIZE(3) VPM 24 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R0.x], R13, ELEM_SIZE(3) VPM 25 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R3.x], R9, ELEM_SIZE(3) VPM 26 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R4.x], R12, ELEM_SIZE(3) VPM 27 ALU: ADDR(280) CNT(2) 64 x: LSHL R4.x, R2.y, (0x00000002, 2.802596929e-45f).x 28 MEM_EXPORT_WRITE_IND: DWORD_PTR[0+R4.x], R8, ELEM_SIZE(3) VPM END_OF_PROGRAM ; ----------------- PS Data ------------------------ ; Input Semantic Mappings IN PARAM0 = position0 V0.xxxx DefaultVal={0,0,0,0} NumTexStages = 0 TexCubeMaskBits = 0x00000000 GprPoolSize = 0 CodeLen = 2432;Bytes PGM_END_CF = 0; words(64 bit) PGM_END_ALU = 0; words(64 bit) PGM_END_FETCH = 0; words(64 bit) MaxScratchRegsNeeded = 0 ;AluPacking = 0.0 ;AluClauses = 0 ;PowerThrottleRate = 0.0 ; texResourceUsage[0] = 0x00000000 ; texResourceUsage[1] = 0x00000000 ; texResourceUsage[2] = 0x00000000 ; texResourceUsage[3] = 0x00000000 ; fetch4ResourceUsage[0] = 0x00000000 ; fetch4ResourceUsage[1] = 0x00000000 ; fetch4ResourceUsage[2] = 0x00000000 ; fetch4ResourceUsage[3] = 0x00000000 ; texSamplerUsage = 0x00000000 ; constBufUsage = 0x00000000 ResourcesAffectAlphaOutput[0] = 0x00000000 ResourcesAffectAlphaOutput[1] = 0x00000000 ResourcesAffectAlphaOutput[2] = 0x00000000 ResourcesAffectAlphaOutput[3] = 0x00000000 ;SQ_PGM_RESOURCES = 0x70000119 SQ_PGM_RESOURCES:NUM_GPRS = 25 SQ_PGM_RESOURCES:STACK_SIZE = 1 SQ_PGM_RESOURCES:PRIME_CACHE_ENABLE = 1 ;SQ_PGM_RESOURCES_2 = 0x000000C0 SQ_LDS_ALLOC_PS:SIZE = 0x00000000 ; SPI_PS_IN_CONTROL_0 = 0x00000100 SPI0:NUM_INTERP = 0 SPI0:POSITION_ENA = 1 SPI0:POSITION_CENTROID = 0 SPI0:POSITION_ADDR = 0 SPI0:PARAM_GEN = 0 SPI0:PERSP_GRADIENT_ENA = 0 SPI0:LINEAR_GRADIENT_ENA = 0 SPI0:POSITION_SAMPLE = 0 ; SPI_PS_IN_CONTROL_1 = 0x00000000 SPI1:GEN_INDEX_PIX = 0 SPI1:FIXED_PT_POSITION_ENA = 0 SPI1:FIXED_PT_POSITION_ADDR = 0 SPI1:FRONT_FACE_ENA = 0 SPI1:FRONT_FACE_ADDR = 0 SPI1:FOG_ADDR = 0 ; SPI_PS_IN_CONTROL_2 = 0x00000000 ; SPI_BARYC_CNTL = 0x00000001 SPI_BARYC_CNTL:PERSP_CENTER_ENA = 1 SPI_BARYC_CNTL:PERSP_CENTROID_ENA = 0 SPI_BARYC_CNTL:PERSP_SAMPLE_ENA = 0 SPI_BARYC_CNTL:PERSP_PULL_MODEL_ENA = 0 SPI_BARYC_CNTL:LINEAR_CENTER_ENA = 0 SPI_BARYC_CNTL:LINEAR_CENTROID_ENA = 0 SPI_BARYC_CNTL:LINEAR_SAMPLE_ENA = 0 ; SPI_INPUT_Z SPI:PROVIDE_Z_TO_SPI = 0 ; CB_SHADER_MASK = 0x0000000F CB:OUTPUT0_ENABLE = 15 ; DB_SHADER_CONTROL = 0x00004600 DB:Z_EXPORT_ENABLE = 0 DB:STENCIL_REF_EXPORT_ENABLE = 0 DB:MASK_EXPORT_ENABLE = 0 DB:ALPHA_TO_MASK_DISABLE = 0 DB:Z_ORDER = 0 DB:KILL_ENABLE = 0 DB:DB_SOURCE_FORMAT = 2 DB:CONSERVATIVE_Z_EXPORT = 0 DB:DEPTH_BEFORE_SHADER = 0 DB:EXEC_ON_HIER_FAIL = 1 ; SQ_PGM_EXPORTS_PS SQ_PGM_EXPORTS_PS:PS_EXPORT_MODE = 0x00000002 ; (1 color)